1. Field of the Invention
The present invention relates to an improved drive apparatus. More specifically, the invention relates to the improved drive apparatus which is driven by applying an alternating voltage to a capacitive load. As one concrete application example, the capacitive load is an electromechanical transducing element.
2. Description of the Related Art
Conventionally, a drive apparatus using a piezoelectric element is provided. Such a drive apparatus is driven by a drive circuit 70 as shown in FIG. 8, for example. In the drawing, 72 is a control circuit, 122 is a piezoelectric element as a capacitive load, F1 and F3 are P-channel FETs (field-effect transistors) for driving, and F2 and F4 are N-channel FETs for driving.
FIG. 9 is a timing chart showing an operating sequence. FIGS. 9(a) through 9(d) show gate voltages of the respective FETs (F1 through F4) to be controlled by the control circuit 72. FIG. 9(e) shows a voltage to be applied to the piezoelectric element 122. The P-channel FETs (F1 and F3) are energized when the gate voltages are Lo as shown by reference numerals 91 and 93, and when the gate voltages becomes Hi, the P-channel FETs are broken. The N-channel FETs (F2 and F4) are broken when the gate voltages are Lo, and when the gate voltages are Hi as shown by reference numerals 92 and 94, the N-channel FETs are energized. In the case of period T1 in FIG. 9, for example, since F1 and F2 are Hi and F3 and F4 are Lo, only F2 and F3 are energized, and a voltage of +E (V) is applied to the piezoelectric element 122 as shown by a reference numeral 80. On the contrary in the case of period T2, since only F1 and F4 are energized, a voltage of −E (V) is applied to the piezoelectric element 122 as shown by a reference numeral 84. As mentioned above, according to the timing charts in FIG. 9, alternating voltages which are twice as much as a power source voltage E are applied to both ends of the piezoelectric element 2 (for example, see Japanese Patent Application Laid-Open No. 2000-350482), respectively.
FIG. 10 is a timing chart showing an operating sequence of a drive apparatus disclosed in Japanese Patent Application Laid-Open No. 2001-211669, for example. A circuit diagram of the drive apparatus disclosed in this publication is the same as that of FIG. 8. A difference with Japanese Patent Application Laid-Open No. 2000-350482 is that periods S1 and S2 are provided between the periods T1 an T2 and electric charges with which the piezoelectric element 122 is charged are temporarily discharged and are reversely charged. Operating patterns of period T1 and period T2 in FIG. 10 are the same as those of the period T1 and the period T2 shown in FIG. 9. At periods S1 and S2, since F1 through F4 are Hi, only the F2 and F4 are energized, and both ends of the piezoelectric element 122 are short-circuited. Therefore, at period T1 and T2, electric charges with which the piezoelectric element 122 is charged are temporarily discharged at period S1 and S2 as shown by reference numerals 82 and 86, and the piezoelectric element 122 is charged to the opposite direction at nest periods T2 and T1.
Incidentally, the piezoelectric element 122 is a capacitive load for accumulating electric charges. For this reason, in a drive apparatus having the conventional structure, when an applying voltage of the piezoelectric element 122 is switched for driving, there arises a problem that a large rush-current flows and power consumption becomes high.
Namely, in the case of Japanese Patent Application Laid-Open No. 2000-350482, as shown by reference numeral 88 and 89 in FIG. 9(e), since both ends voltages of the piezoelectric element 122 are switched from +E (V) into −E (V) or from −E (V) into +E (V) steeply, a rush-current I becomes as follows:I=2E/r  (1)
(r is a general resistance value of an ON resistance of FET, an output resistance of a power source, a line resistance or the like).
In addition, in the case of Japanese Patent Application Laid-Open No 2001-211669, since electric charges of the piezoelectric element 122 are temporarily discharged and the piezoelectric element is charged to the opposite direction, as shown by reference numerals 81, 83, 85 and 87 in FIG. 10(e), a rush-current I becomes as follows:I=E/r  (2)
(r is a general resistance value of an ON resistance of FET, an output resistance of a power source, a line resistance or the like), namely, the rush-current I is reduced to half, but a suppressing effect of a rush-current is not sufficient.